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Home-Built CPU Runs With Home-Built Toolchain

A few years ago [Takaya Saeki] and fellow students of the University of Tokyo, were given a very limited instruction during their ‘CPU exercise’ class, along the lines of:

Take this ray-tracing program written in OCaml and run it on your CPU implemented on an FPGA

Splitting into groups to cover the CPU, FPU, simulator tool, and compiler toolchain, the students started with designing a RISC ISA, then designed a CPU around that. You can follow along with the retrospective writeup of the class, then dive into the GitHub pages for each of the components of the system, although the commentary is mainly in Japanese. Hey, you can google translate right?

The original task was to run a raytracing demo on the FPGA-hosted CPU, but the students went much further, porting Xv6, which is a Unix-like OS intended for educational use, provided by MIT, then ran the OCaml raytracing demo on top of that. Xv6 is intended for x86, not their own ISA, so a significant amount of work was needed on the compiler toolchain. The obvious path would be to port LLVM or GCC, but the group decided it would be more fun to make their C89-compliant toolchain from scratch, and UCC was born!

The original CPU did not have an MMU or interrupt handling, so this needed to be added to the design as well as the simulator. One of the gang added the extra hardware features needed to support the Unix-like OS, producing a new CPU design, which they named GAIA. The final version of Xv6 for the GAIA CPU can be found here. If you want to play around with this, they even made a Javascript version (using emscripten) so you can have a go in your browser! Blimey, and we thought our student projects were hard, let alone doing this much for extra credit!

Now, we know what you’re thinking — the number one question — can it run doom? We don’t know yet, but here on, there’s always another one around the corner that can.